FRONTIER R&D

PILLAR DELTAAI LABS

Enter the lab

We are looking past the transformer.

Pillar Delta AI Labs investigates what intelligence can become when its foundations change—from the neuron and the representation to the memory system and the silicon beneath it.

Our work begins with mechanisms found in biology and asks what they make possible in computation. We build non-monotonic neurons, naturally sparse networks, hierarchical architectures, and systems that reason over time without treating efficiency as an afterthought.

The Lab connects theory to working systems. Ideas move through simulation, implementation, reproducible benchmarks, and hardware-aware testing before they become a platform, a product, or a new research question.

Four layers of the same problem.

We work across the intelligence stack because a new architecture cannot be separated from the representation, memory, and compute systems that make it useful.

01CORE

Biological neural architectures

NmNN replaces the conventional always-rising neuron with a three-region response: silent, peak, and decay. That primitive creates selective activation and networks that are sparse by design.

  • NmNN
  • V3G
  • SUPRA
  • NmRNN
02REPRESENTATION

Geometric representation & memory

HyperToken reorganizes language into semantic, structural, and abstraction axes. MeaningMemory explores how an AI can identify, score, and retrieve what matters across time.

  • HyperToken
  • IBSM
  • SUPRA-2
  • MeaningMemory
03COMPUTE

Sparse acceleration & silicon

Project Aylos and N1 translate structural sparsity into an acceleration layer: active-block routing, block-diagonal compute, fused activation, and a path from software kernels to dedicated silicon.

  • Aylos
  • N1 Virtual Chip
  • N1 Sparsifier
  • Q-NmNN
04FRONTIER

Adaptive and unconventional systems

We test systems whose connectivity, temporal state, or computational substrate can change—from learned dendritic routing to Physarum-inspired networks and four-level logic.

  • MORPHE
  • PRIMUS
  • NmNN-T
  • Q-NmNN

The smartest thing in the room was always the neuron.

A conventional activation mostly knows how to say “more.” The non-monotonic neuron is selective: it stays silent below a threshold, rises to a peak, then decays. The result is a richer computational primitive and exact zeros that the rest of the system can exploit.

Non-monotonic activation curve A response curve with silent, peak, and decay regions. SILENT PEAK DECAY
Selective response creates natural sparsity without adding a separate pruning step.
01

Biologically grounded

Architectural choices begin with documented mechanisms in cortical computation, not biology used as decoration.

02

Efficient by architecture

Sparsity is part of the computational design itself, so efficiency can remain meaningful as systems scale.

03

Composable by design

New primitives can extend existing models and hardware while we develop architectures built around them from first principles.

One primitive. A connected research stack.

Each program answers a different part of the same question: how do we build capable systems that compute less, represent more, and retain what matters?

FOUNDATION

NmNN

The core three-region non-monotonic neuron and the foundation for the architecture family.

NEURAL PRIMITIVE

ARCHITECTURE

V3G / SUPRA

Sparse networks composed into hierarchical superneurons for language, vision, signals, and temporal data.

MULTI-DOMAIN

REPRESENTATION

HyperToken

A geometric alternative to one-dimensional token sequences, organized by meaning, position, and abstraction.

THEORY V3.0

MEMORY

MeaningMemory

An infrastructure layer for deciding what an AI should remember, how important it is, and when it should return.

PERSISTENT CONTEXT

ACCELERATION

Project Aylos / N1

A hardware-aware sparse compute path from PyTorch and Triton kernels toward a dedicated inference processor.

ROAD TO SILICON

FRONTIER

Q-NmNN / MORPHE / PRIMUS

Four-level logic, learnable connectivity, and bio-inspired adaptive routing beyond conventional training assumptions.

EXPERIMENTAL

Research becomes infrastructure.

The Lab is not the final destination. When an architecture survives implementation and verification, we translate it into a system that can operate beyond the experiment.

TRANSLATIONAL SYSTEM

PRODUCTION ENGINEERING · PRE-AUDIT

CAPSULE TRANSPORT PROTOCOL

CTP

CTP is a research-originated secure communication architecture translated into a native implementation and a cross-verified protocol stack. Instead of treating a message as durable data to be decrypted, CTP packages it as a session-bound executable capsule designed to render once and erase itself.

Explore the CTP technical overview
Native RustNine-crate client workspace plus a carried runtime
350+ testsDefault native verification suite
12 fuzz targetsProtocol and implementation stress testing
Cross-verifiedByte-identical Rust and TypeScript test vectors

Independent cryptographic review remains pending. The native client is the implemented system; the web client is a reference demonstration, not a deployment.

Measured, not imagined.

Selected signals from the current research corpus. Validation conditions vary by model and domain.

70–99%Structured sparsity reported across the architecture family
24+Systems spanning theory, models, memory, compression, and compute
5Validated application domains across language, vision, medical, audio, and finance

From strange idea to working evidence.

  1. 01

    Observe

    Start with a mechanism from biology, physics, mathematics, or information theory.

  2. 02

    Formalize

    Turn the intuition into a computational primitive, a model, and a falsifiable claim.

  3. 03

    Build

    Implement the system, test it across scales, and examine where its behavior breaks.

  4. 04

    Translate

    Move validated ideas into research tools, efficient runtimes, products, or silicon.

Build beyond the obvious.

We are opening selected research programs to scientific collaborators, technical partners, and organizations exploring efficient intelligence.

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